ID badges: Hide | Show

Part 3AMENDMENTS TO COUNCIL REGULATION (EC) NO 428/2009

Amendments to Category 3 - Electronics

regulation 11 11.—(1) The section headed Category 3 - Electronics is amended as follows.

(2) In the section headed 3A Systems, Equipment and Components—

regulation 11 2 a (a)in the Note to entry 3A001.a.—

regulation 11 2 a i (i)for “Film type integrated circuits” substitute ‘Film type integrated circuits’;

regulation 11 2 a ii (ii)for “Three dimensional integrated circuits” substitute ‘Three dimensional integrated circuits’;

regulation 11 2 a iii (iii)after (“MMICs”). insert—

Technical Notes:
For the purposes of 3A001.a., Note:
1.‘Film type integrated circuit’ is an array of “circuit elements” and metallic interconnections formed by deposition of a thick or thin film on an insulating “substrate”.
2.‘Three dimensional integrated circuit’ is a collection of semiconductor dies or active device layers, integrated together, and having through semiconductor via connections passing completely through an interposer, substrate, die or layer to establish interconnections between the device layers. An interposer is an interface that enables electrical connections.;

regulation 11 2 b (b)in entry 3A001.a.2., for “analogue-to-digital converters, integrated circuits that contain analogue-to-digital converters and store or process the digitised data, digital-to-analogue converters” substitute “Analogue-to-Digital Converters (ADCs), integrated circuits that contain ADCs and store or process the digitised data, Digital-to-Analogue Converters (DACs)”;

regulation 11 2 c (c)in entry 3A001.a.5.b., for “Digital-to-Analogue Converters (DAC” substitute “DACs”;

regulation 11 2 d (d)in entry 3A001.a.5.b.1., after “10 bit or more” insert “,”;

regulation 11 2 e (e)in the Note to entry 3A001.a.7.—

regulation 11 2 e i (i)after (CPLDs) insert ;;

regulation 11 2 e ii (ii)after (FPGAs) insert ;;

regulation 11 2 e iii (iii)after (FPLAs) insert ;;

regulation 11 2 e iv (iv)after (FPICs) insert .;

regulation 11 2 f (f)in entry 3A001.a.10.b., for ““basic gate propagation delay time”” substitute “‘basic gate propagation delay time’”;

regulation 11 2 g (g)at the end of entry 3A001.a.10., insert—

Technical Notes:
For the purposes of 3A001.a.10.b:
1.‘Basic gate propagation delay time’ is the propagation delay time value corresponding to the basic gate used in a “monolithic integrated circuit”. For a ‘family’ of “monolithic integrated circuits”, this may be specified either as the propagation delay time per typical gate within the given ‘family’ or as the typical propagation delay time per gate within the given ‘family’.
2.‘Basic gate propagation delay time’ is not to be confused with the input/output delay time of a complex “monolithic integrated circuit”.
3.‘Family’ consists of all integrated circuits to which all of the following are applied as their manufacturing methodology and specifications except their respective functions:
a.The common hardware and software architecture;
b.The common design and process technology; and
c.The common basic characteristics.;

regulation 11 2 h (h)in the N.B.1. to entry 3A001.a.14., for analogue-to-digital converter integrated circuits substitute Analogue-to-Digital Converter (ADC) integrated circuits,;

regulation 11 2 i (i)in the N.B.2. to entry 3A001.a.14., after devices insert ,;

regulation 11 2 j (j)in entry 3A001.b.1.d., for “‘dual mode’.” substitute “‘dual mode’;”;

regulation 11 2 k (k)in the N.B. to entry 3A001.b.2., after shifter insert ,;

regulation 11 2 l (l)in Note 1 to entry 3A001.b.3., for through substitute to;

regulation 11 2 m (m)in entry 3A001.b.4., for “solid state”, in both places it occurs, substitute “solid-state”;

regulation 11 2 n (n)in entry 3A001.b.4.e.3., for “90 GHz; or substitute “90 GHz.”;

regulation 11 2 o (o)in the N.B.1. to entry 3A001.b.4., after amplifiers insert ,;

regulation 11 2 p (p)in the N.B.2. to entry 3A001.b.4., after ‘transmit modules’ insert ,;

regulation 11 2 q (q)in entry 3A001.b.7.c.2., after “GHz;”, insert or;

regulation 11 2 r (r)in entry 3A001.b.7.c.3., omit “or”;

regulation 11 2 s (s)in entry 3A001.b.11., including the Technical Note, for “synthesiser”, in both places it occurs, substitute “synthesizer”;

regulation 11 2 t (t)in entry 3A001.c.1.b., after “1 GHz” omit “,”;

regulation 11 2 u (u)in the Technical Notes to entry 3A001.e.1., for Ohms substitute ohms;

regulation 11 2 v (v)in entry 3A001.e.3.c.—

regulation 11 2 v i (i)for ““overall current density”” substitute “‘overall current density’”;

regulation 11 2 v ii (ii)at the end, insert—

Technical Note:
For the purposes of 3.A001.e.3.c., ‘overall current density’ is the total number of ampere-turns in the coil (i.e., the sum of the number of turns multiplied by the maximum current carried by each turn) divided by the total cross-section of the coil (comprising the superconducting filaments, the metallic matrix in which the superconducting filaments are embedded, the encapsulating material, any cooling channels, etc.).;

regulation 11 2 w (w)in Note 1 to entry 3A001.g.—

regulation 11 2 w i (i)after (SCRs) insert ;;

regulation 11 2 w ii (ii)after (ETTs) insert ;;

regulation 11 2 w iii (iii)after (LTTs) insert ;;

regulation 11 2 w iv (iv)after (IGCTs) insert ;

regulation 11 2 w v (v)after (GTOs) insert ;;

regulation 11 2 w vi (vi)after (MCTs) insert ;;

regulation 11 2 w vii (vii)after Solidtrons insert .;

regulation 11 2 x (x)in Note 2 to entry 3A001.h.—

regulation 11 2 x i (i)after (JFETs) insert ;;

regulation 11 2 x ii (ii)after (VJFETs) insert ;;

regulation 11 2 x iii (iii)after (MOSFETs) insert ;;

regulation 11 2 x iv (iv)for (DMOSFET) substitute (DMOSFETs);;

regulation 11 2 x v (v)for (IGBT) substitute (IGBTs);;

regulation 11 2 x vi (vi)after (HEMTs) insert ;;

regulation 11 2 x vii (vii)after (BJTs) insert ;;

regulation 11 2 x viii (viii)after (SCRs) insert ;;

regulation 11 2 x ix (ix)after (GTOs) insert ;;

regulation 11 2 x x (x)after (ETOs) insert ;

regulation 11 2 x xi (xi)after PiN Diodes insert ;

regulation 11 2 x xii (xii)after Schottky Diodes insert .;

regulation 11 2 y (y)for entry 3A002.a.7., including the Note, substitute—

7.Real-time oscilloscopes having all of the following:
a.A vertical root-mean-square (rms) noise voltage of less than 2% of full-scale at the vertical scale setting that provides the greatest noise value; and
b.An ‘upper 3dB frequency’ greater than 90 GHz on any channel.
Note:3A002.a.7 does not control equivalent-time sampling oscilloscopes.
Technical Notes:
For the purposes of 3A002.a.7.b.:
1.‘Upper 3dB frequency’ is the greater of:
a.The specified 3dB bandwidth of the oscilloscope; or
b.The maximum upper end of the frequency range of any ‘movable bandwidth window’.
2.‘Movable bandwidth window’ is a bandpass filter with a user-definable centre frequency or span.;

regulation 11 2 z (z)in entry 3A002.h.1.d., after “14 bit or more” insert “,”.

(3) In the section headed 3B Test, Inspection and Production Equipment—

regulation 11 3 a (a)in the Technical Note to entry 3B001.f.1.b., after 0,35 insert .;

regulation 11 3 b (b)in the Note to entry 3B001.f.2—

regulation 11 3 b i (i)after printing tools insert ;;

regulation 11 3 b ii (ii)after embossing tools insert ;;

regulation 11 3 b iii (iii)after lithography tools insert ;;

regulation 11 3 b iv (iv)after (S-FIL) tools insert ..

(4) In the section headed 3C Materials, in entry 3C005.b., at the end insert—

N.B.For materials consisting of a ‘substrate’ specified in 3C005 with at least one epitaxial layer, see 3C001 or 3C006..

(5) In the section headed 3E Technology—

regulation 11 5 a (a)in entry 3E003.b., for “high electron mobility transistors (HEMT), hetero-bipolar transistors (HBT)” substitute “High Electron Mobility Transistors (HEMTs), Heterojunction Bipolar Transistors (HBTs)”;

regulation 11 5 b (b)in the Note to entry 3E003.b. —

regulation 11 5 b i (i)for high electron mobility transistors (HEMT) substitute HEMTs;

regulation 11 5 b ii (ii)for hetero junction bipolar transistors (HBT) substitute HBTs.